신재환
M.S. Electrical and Computer Engineering, Inha University
Teradyne | Thesis: A Scalable ATE-Based Test Compression Architecture for High-Parallel Testing
Members / Alumni
Graduated members, thesis topics, and current affiliations.
Graduated members continue their careers across semiconductor, EDA, electronics, and research organizations.
M.S. Electrical and Computer Engineering, Inha University
Teradyne | Thesis: A Scalable ATE-Based Test Compression Architecture for High-Parallel Testing
M.S. Electrical and Computer Engineering, Inha University
ASICLAND | Thesis: GNN-Based Scan Chain Reordering Scheme for Low-Power Scan Testing
M.S. Electrical and Computer Engineering, Inha University
Thesis: Top Socket Contact Resistance Measurement Scheme Using ZQ Calibration Circuit for PoP-Based Package-Level Test
B.S. Electrical and Electronic Engineering, Inha University
SK hynix | Thesis: Partitioned Deterministic Seed-Based LBIST Architecture for Fault Coverage Improvement
B.S. Electrical and Electronic Engineering, Inha University
SK hynix | Thesis: A Self-Recovery Scheme for Fault-Tolerant and Side-Channel Resistant Systolic Arrays
B.S. Electrical and Electronic Engineering, Inha University
SK hynix | Thesis: SDC-aware Masking Scheme for Biased SEUs and Directional Bit-Flipping
M.S. Electrical and Computer Engineering, Inha University
Teradyne | Thesis: A New Programmable Instruction Set Architecture for Linear and Nonlinear Memory Test Pattern Generation
M.S. Electrical and Computer Engineering, Inha University
TERADYNE | Thesis: CAN ID Error Detection for High Reliability Automotive Network
B.S. Computer Engineering, Chonnam National University
Telechips | Thesis: AI-Based Medicine Delivery Robot
B.S. Electronic Engineering, Chonnam National University
HARMAN (SoC Verification) | Thesis: Gas Detection Drone for Digital Immune Systems
M.S. ICT Convergence System Engineering, Chonnam National University
Telechips | Thesis: Hardware-Optimized Security Circuits Against Invasive Attacks
M.S. ICT Convergence System Engineering, Chonnam National University
Thesis: TSV Testing Method Based on Two-Dimensional Diagonal Parity Check
M.S. ICT Convergence System Engineering, Chonnam National University
Thesis: A Study on Early Termination Techniques for TSV Repairability
M.S. ICT Convergence System Engineering, Chonnam National University
Siemens EDA | Thesis: Timestamp-Based Detection Scheme for Security IPs Protection Against Invasive Attacks
B.S. Computer Engineering, Chonnam National University
POSCO
B.S. Computer Engineering, Chonnam National University
Advantest
B.S. Computer Engineering, Chonnam National University
Samsung Electronics, Memory Business
B.S. Computer Engineering, Chonnam National University
POSCO